IP BASED SOC DESIGN 2002
http://www.us.design-reuse.com/WORKSHOP/IP_design02.html
October 30-31, 2002
Grenoble, France
  

The 11th "IP based SOC Design Workshop" will take place in Grenoble,
France on October 30 - 31, 2002.

Among 100 submissions the best technical contributions have been
selected to bring together a high level working conference unique
on hot topics such as "Impact of Submicron Technology", "IP
Management and Collaborative Design", "Verification IP", "IP
Business Models", and "Platform Based Design and Embedded System".

The programme has outlined most of the foremost players actively
involved in this field planning  to deliver their latest products
and  major fact announcements at this event.

Please refer to the Online Program:
http://www.us.design-reuse.com/WORKSHOP/program.html

The major players will deliver keynote talks on hot topics and
you will be delighted to listen to :

- John Chilton, senior vice president and general manager of
  Synopsys IP and Systems business unit discussing "IP Market
  Challenges: Today and the Next Generation";

- Michael Kaskowitz, General Manager and VP of the IP Business
  unit of Mentor Graphics sharing his experiences in "Building
  Successful IP Partnerships - Selecting IP for Successful SoC
  Design";

- Thierry Pfirsch Core Competence Manager for IP, Alcatel
  Hardware Coordination from Alcatel talking about "IP
  Management in a Large Company";

- Jim Tully, Chief Analyst from Gartner Dataquest
  presenting the studies on the "IP Market Overview and Outlook".


On October 31st the "Best IP/SOC" trophy sponsored by ST
Microelectronics will be given involving a selection among 
eight candidate companies.

In addition the "IP based SOC Design Workshop" has an exhibition
attached, organised by CMP and D&R giving you the opportunity to
see the reality of a SOC connected world.

The joint exciting dedicated exhibition will allow you to
meet the most advanced suppliers and take the chance to
see the last products of the best vendors including :
      - Accent,
      - Artisan Components, 
      - Axis Systems, 
      - Cadence Design Foundry,
      - CoWare, 
      - Denali Software, 
      - Design And Reuse, 
      - Dolphin Integration, 
      - Ericsson Technology Licensing, 
      - GeTeDes,
      - Infineon Technologies, 
      - Jennic, 
      - OCP-IP, 
      - ProDesign, 
      - SuperH, 
      - Synchronicity, 
      - Synopsys, 
      - VCX, 
      - Verisity 

You can still book your space:
http://www.us.design-reuse.com/WORKSHOP/demo_space.html


ONLINE REGISTRATION:
Please pre-register online :
http://www.us.design-reuse.com/WORKSHOP/register.html

A top level tutorial is offered in order to allow teachers,
students ,design engineers  and reuse managers to capture 
at a glance the best vision and methodolgy for installing 
design reuse


AROUND THIS EVENT:
Qualis Europe invites you to attend public training courses :
"Jump-Start in Verification using Specman Elite" 
(October 28-30, 2002 - Grenoble, France)
http://www.us.design-reuse.com/cgi-bin/redirect.pl?ID=176


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AROUND WWW.DESIGN-REUSE.COM
===========================

* SOC NEWS ALERTS
Receive free news updates related to the SoC field on your 
desktop on a regular basis, go to :
http://www.us.design-reuse.com/SOCNEWS

* D&R ELECTRONIC DESIGN SERVICES MARKETPLACE
Post your project for quick access to the best electronic experts, 
go to :
http://www.us.design-reuse.com/DESIGN_SERVICES

* VISIT THE VERIFICATION CORNER
Learn more about  worldwide  efforts in qualifying IPs
and SoCs, go to :
http://www.us.design-reuse.com/VERIFICATION
with the participation of TransEDA

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